In a solid-state image sensing element employed in a CMOS (Complementary Metal Oxide Semiconductor) image sensor or the like, for example, a photoelectric conversion portion is provided on a silicon substrate and light should pass through as far as a substrate surface. When light is incident on a transistor provided around the photoelectric conversion portion on the silicon substrate, however, an unnecessary current is generated and image quality may deteriorate.
As a technique for preventing disadvantages caused by incident light, for example, Japanese Patent Laying-Open No. 2004-140309 (PTL 1) discloses the following solid-state image sensing element. Namely, a photoelectric conversion element generating and storing charges at least in accordance with incident light and a charge transfer portion transferring signal charges generated and stored by the photoelectric conversion element are provided on a semiconductor substrate. Then, on the semiconductor substrate, a transfer electrode for the charge transfer portion and a light cut-off film including an opening corresponding to a light reception region of the photoelectric conversion element are provided, at least with a gate insulating film being interposed. In addition, a transparent insulating film is provided in a region on the gate insulating film corresponding to the light reception region of the photoelectric conversion element. The light cut-off film is embedded such that an inner circumferential shape of the opening thereof extends along an outer circumferential shape of the transparent insulating film and such that a bottom surface portion of the opening is in direct contact with the gate insulating film.
In addition, a plurality of pixel circuits arranged in a plurality of rows and a plurality of columns have conventionally been provided in an image sensor. Each pixel circuit includes a photoelectric conversion element outputting a current having a value in accordance with a quantity of incident light, a capacitor, a transfer transistor connected between the photoelectric conversion element and the capacitor, and an amplifier transistor generating a pixel signal at a level in accordance with a voltage across terminals of the capacitor.
A scheme for reading a pixel signal includes an XY address reading scheme for successively reading a plurality of pixel signals generated by a plurality of pixel circuits for each row while all pixel circuits are exposed to light and a global shutter scheme for successively reading a plurality of pixel signals generated by a plurality of pixel circuits for each row after all pixels circuits are collectively exposed to light for a prescribed period of time (see, for example, Japanese Patent Laying-Open No. 2008-42714 (PTL 2)).
Further, for example, Japanese Patent Laying-Open No. 2006-211630 (PTL 3) discloses the following configuration as a solid-state image sensing element employed for a CMOS image sensor. Namely, a pixel array portion in which pixels are diagonally aligned and an odd-numbered-row vertical signal line group is wired for each column of pixels in an odd-numbered row in the pixel alignment and an even-numbered-row vertical signal line group is wired for each column of pixels in an even-numbered row, row selection means for separately selecting an odd-numbered row in the pixel alignment above and selecting an even-numbered row therein, an odd-numbered-row column processing circuit group connected to the odd-numbered-row vertical signal line group and adding signals of pixels between columns, an even-numbered-row column processing circuit group connected to the even-numbered-row vertical signal line group and adding signals of pixels between columns, and column selection means for selecting each column processing circuit in the odd-numbered-row column processing circuit group and each column processing circuit in the even-numbered-row column processing circuit group are included.
Furthermore, an effective image pick-up portion and an optically black portion have conventionally been provided in an image sensor. A plurality of pixels are provided in the effective image pick-up portion, and each pixel includes a photodiode and a read circuit reading a photocurrent generated in the photodiode. The optically black portion is identical in configuration to the effective image pick-up portion and provided with a pixel covered with a light cut-off layer. A read circuit for the pixel in the optically black portion reads a dark current generated in the photodiode when there is no incident light. The photocurrent read from the pixel in the effective image pick-up portion is corrected based on the dark current read from the pixel in the optically black portion.
In order to eliminate difference in level between the dark current generated in the pixel in the effective image pick-up portion not covered with the light cut-off layer and the dark current generated in the pixel in the optically black portion covered with the light cut-off layer, a method of making characteristics of the photodiode in the effective image pick-up portion different from characteristics of the photodiode in the optically black portion is available (see, for example, Japanese Patent Laying-Open No. 6-151806 (PTL 4)).
In addition, an image sensor including a compound semiconductor such as Cu(Inx,Ga(1-x)Se2 (0≦x≦1) (hereinafter denoted as CIGS) has been developed in recent years. In a conventional first image sensor, a transparent electrode is formed on a surface of a CIGS thin film and a plurality of pixel electrodes are formed on a back surface of the CIGS thin film. When the CIGS thin film is irradiated with light, electron-hole pairs in an amount in accordance with a quantity of light are produced. Holes, that is, positive charges, of the electron-hole pairs produced in the CIGS thin film flow to the read circuit through the pixel electrode.
In a conventional second image sensor, a CIGS thin film is etched and separated into a plurality of CIGS layers. A transparent electrode is formed on a surface of each CIGS layer and a pixel electrode is formed on a back surface of each CIGS layer (see, for example, Japanese Patent Laying-Open No. 2007-123721 (PTL 5)).
Moreover, NPL 1, NPL 2 and NPL 4 disclose techniques for displaying various objects to be measured on a screen. NPL 3 discloses a spectral characteristics table of a CMOS image sensor and an image sensor including CIGS.